In this task, you integrate an output device, a TTY (simple console output) into the CPU simulation to display the ASCII character corresponding to the current hex value in the ACC. 1.5.2 Detailed instructions The instruction decoding

Department of Computing and Mathematics

ASSESSMENT COVER SHEET 2024/25

Module Code and Title:

6G4Z0031 Computer Architecture

Assessment Set By:

Elaine Duffin

Assessment ID:

1CWK100

Assessment Weighting:

100%

Assessment Title:

Computer Architecture Report

Type:

Individual

Hand-In Deadline:

See Moodle

Hand-In Format and Mechanism:

All practical and written work will be incorporated into a single report to be uploaded to Moodle.

a

Learning outcomes being assessed:
LO1

Develop a sequential, digital electronic circuit using emulation software to a strict specification and document that development.

LO2

Build a structured assembly language program that uses both system calls and a range of memory locations in a microprocessor to invoke higher order sequential operation from a microprocessor and reflectively document that operation and contrast it to LO1.

Note: it is your responsibility to make sure that your work is complete and available for marking by the deadline. Make sure that you have followed the submission instructions carefully, and your work is submitted in the correct format, using the correct hand-in mechanism (e.g., Moodle upload). If submitting via Moodle, you are advised to check your work after upload, to make sure it has uploaded properly. If submitting via OneDrive, ensure that your tutors have access to the work.Donotalteryourworkafterthedeadline. You should make at least one full backup copy of your work.

Penalties for late submission
The timeliness of submissions is strictly monitored and enforced.

All coursework has a late submission window of 7 calendar days, but any work submitted within the late window will be capped at 40%, unless you have an agreed extension. Work submitted after the 7-day late window will be capped at zero unless you have an agreed extension. See Assessment Mitigation below for further information on extensions.

Please note that individual tutors are unable to grant any extensions to assessments.

Assessment Mitigation
If there is a valid reason why you are unable to submit your assessment by the deadline you may apply for Assessment Mitigation. There are two types of mitigation you can apply for via the module area on Moodle (in the Assessments block on the right-hand side of the page):

Non-evidenced extension : does not require you to submit It allows you to add a short extension to a deadline. This is not available for event-based assessments such as in- class tests, presentations, interviews, etc. You can apply for this extension during the assessment weeks, and the request must be made before the submission deadline. For this assessment, the self-certification extension is 2 days .Evidenced extension : requires you to provide independent evidence of a situation which has impacted Allows you to apply for a longer extension and is available for event-based assessment such as in-class test, presentations, interviews, etc. For event-based assessments, the normal outcome is that the assessment will be deferred to the summer reassessment period.
Further information about Assessment Mitigation is available on the dedicatedAssessmentspage.

Plagiarism
Plagiarism is the unacknowledged representation of another persons work, or use of their ideas, as ones own. Manchester Metropolitan University takes care to detect plagiarism, employs plagiarism detection software, and imposes severe penalties, as outlined in theStudentCodeofConductandAcademicMisconductPolicy. Poor referencing or submitting the wrong assignment may still be treated as plagiarism. If in doubt, seek advice from your tutor.

As part of a plagiarism check, you may be asked to attend a meeting with the Module Leader, or another member of the module delivery team, where you will be asked to explain your work (e.g. explain the code in a programming assignment). If you are called to one of these meetings, it is very important that you attend.

Use of generative AI
The use of generative AI is permitted in this assessment, but please make sure you follow these specific instructions:

Refer to the instructions for a creative piece in theAreyouallowedtouseAIinassessments?section of theAILiteracyRiseStudyPack.

As AI generated content for this assessment is considered as a creative piece , if you use a generative AI tool as part of the process, you must make sure that you clearly document that usage by clearly stating where it has been used and providing all prompts and outputs in an appendix .

If you are unsure, check with a tutor and/or make sure all prompts and outputs are included.

If you are unable to upload your work to Moodle
If you have problems submitting your work through Moodle, you can send your work to the Assessment Management Team using theContingency Submission Form.Assessment Management will then forward your work to the appropriate person for marking. If you use this submission method, your work must be sent before the published deadline , or it will be logged as a late submission. Alternatively, you can save your work into a single zip folder then upload the zip folder to your university OneDrive and submit a Word document to Moodle which includes a link to the folder.ItisyourresponsibilitytomakesureyousharetheOneDrivefolderwiththeModuleLeader,oritwillnotbepossibletomarkyourwork.

Assessment Regulations
For further information see theUndergraduateAssessmentRegulationson theAssessmentsandResults information pages

Formative Feedback:

Verbal feedback to help you improve your work for this coursework is available in the optional drop-in sessions (shown on your timetable) and in the lab sessions in weeks 7 and 11.

Summative Feedback:

Individual and general written feedback will be given through Moodle within 4 weeks after the submission deadline.

Overview
This Computer Architecture coursework involves developing a CPU simulation using Logisim Evolution logic circuit simulator and RISC-V assembly language programs using RARS emulator. You will submit images and explanations in a report structure provided, with code in the appendices.

You must use the provided materials from Moodle, the report structure document, the starter code items with Logisim Evolution (https://github.com/logisim-evolution/logisim-evolution) and RARS (https://github.com/TheThirdOne/rars). The software is installed on lab computers or ensure that they work on your own device.

A high-quality report, including clear images and concise explanations, will be needed for high marks. Initial tasks have detailed instructions and need brief explanations (50-80 words each). Later tasks are more complex, needing logical thinking, additional research, and longer explanations (100- 300 words).

Support
The Coursework Additional Hints and Advice document on Moodle gives further tips. Use the Coursework Video Guides , including The Road to 40 videos, for demonstrations of several tasks including filling in the report structure.

Use Module Leaders office hours during teaching weeks (as shown on Moodle) or the optional drop-in on Fridays for advice. Lab sessions in weeks 7 and 11 will be used for coursework support; make a start or continue your work with face-to-face feedback and advice. For complex tasks, tutors provide hints but not direct solutions.

Send questions to the tutors by email or using MS Teams (try the Coursework Additional Hints and Advice document beforehand) and allow up to two working days for a response. Note that the deadline is in January and no tutors are available for parts of the winter break. There will be additional tutor availability advertised leading up to the deadline.

Use of AI and References
You are expected to use additional materials beyond those provided on Moodle. Showing additional research will be essential to reach the highest grades.

For this coursework, use Moodle materials, Logisim Evolution and RARS and websites to help convert between decimal, binary and hexadecimal without referencing. As explained on page 2, Generative AI usage must be evidenced in an appendix. All additional research must be cited and referenced in Cite Them Right Harvard style. You may be called to a meeting to discuss the work (as described on page 2) if the submission seems to use research which is not acknowledged.

Employability
You are expected to show professional standards in your work. Especially early in your career, you might be given very detailed specifications which you are expected to follow systematically. This needs a careful, thorough approach with attention to details. This approach is based on industry experience, including amending an existing product and carefully documenting testing (in this case using images).

1. CPU Simulation
You need to use the report structure document, use the headings with the same number as the task and add text or images under the subheadings in the report structure document as described.

Download the following resources from Moodle and store them together in a folder, ideally on your university OneDrive. If download as a zip file, unzip (extract) them before use.

CPU circuit (CPU_simulation_starter.circ)Starter program(s) (program1.dat, dat)Test data
For many tasks, you will use digits from your student id as test data. Use the last four digits of your student ID split into two 2-digits numbers. For the CPU simulation work, convert these two numbers from decimal to hexadecimal.

For example, if your student id is 15654321, the last four digits are 4321. Splitting into two 2-digit numbers gives 43 and 21 in decimal. Converting these to hexadecimal gives 2b and 15.

Adding the Logisim Evolution file to your report
Include the full Logisim Evolution code containing all attempted parts of the CPU work in Appendix A. To do this, open your Logisim Evolution .circ file in Notepad++ (or another plain text editor) highlight and copy all the code and paste into your appendix. Change the code to a fixed-width font (e.g., Consolas).

1.1 Calculating the sum of values
1.1.1 Overview
This task involves storing and adding two numbers (provided as immediate values) and saving the sum in memory.

1.1.2 Detailed instructions
Open the circuit provided ( CPU_simulation_starter.circ ) in Logisim Evolution. Change the student ID in the circuit to your own student ID. Save the circuit.

In the Test Data in the section for this task in your report, give the last four digits of your student ID as two separate 2-digit decimal numbers and their hexadecimal equivalents.

Open the program1.dat file in a text editor (e.g., notepad++). The file should look like this:

v2.0 raw

102b 3000 # 1. put first value to ACC and address 00 1015 3001 # 2. put second value to ACC and address 01 2100 # 3. add ACC value to value from address 00 3002 # 4. store ACC value at address 02

f000 # 5. stop

Change the immediate values (highlighted as 2b on line 1 and 15 on line 2) to your two hexadecimal test numbers. Save the file and paste its contents under the heading Test Program .

Add your two test numbers. Under Expected Result in your report, give the total in decimal and in hexadecimal.

Load your amended file program1.dat to memory A. Under Circuit with program loaded, add an image of the CPU; make sure that the values in the program are clear.

Run the program and stop clicking the clock when instruction f000 is highlighted in memory A. Add an image taken at this point under the heading Circuit at end of program .

Compare the simulations outcome with your expected result and explain your finding under the heading Result .

1.2 Completing the stop instruction
1.2.1 Overview
In this task you will modify the simulations circuitry so that the program does not continue when instruction f000 is reached.

1.2.2 Detailed instructions
In the CPU simulation, find the output from Instruction Decoding unit labelled Stop . This 1-bit control signal will be on (1) when the opcode (first digit of the instruction) is f, indicating the program needs to stop.

Use gates and wiring to make the clock input to the components (PC, ACC, and memory B) stay on 0 when the Stop signal is 1. A clock signal of 1 should only reach the other components when the clock signal is 1 AND the Stop signal is NOT 1.

Under the heading Memory Components explain the purpose of the two memory components (labelled Memory_A and Memory_B) using your understanding from task 1.1. Change the labels for both the memory blocks to reflect their usage. This specification will continue to use the original names Memory A and Memory B. You should use your new names in your report.

Reset the registers to 0 and load your program (as in task 1.1) and add an image showing your setup and wiring to your report under Circuit at Start of Test .

Run your program, keep clicking the clock after instruction f000 is reached to ensure that the program does not continue. Under Circuit at End of Test add an image with instruction f000 highlighted and the clock signal 1 (bright green), showing that the clock signal is not passed to the other components.

Under Explanation , explain why Memory A does not need a clock signal and compare to Memory B. Use your new labels for the memory blocks.

1.3 Bitwise Operations
1.3.1 Overview
In this task, as well as addition, you will perform bitwise AND and bitwise XOR operations on the same two numbers.

1.3.2 Detailed instructions
Open program2.dat in a text editor. It should look like this:

v2.0 raw

102b 3000 # 1. put first value to ACC and store to 00 1015 3001 # 2. put second value to ACC and store to 01 2100 # 3. add ACC value to value from address 00 3002 # 4. store ACC value to address 02

2000 2201 # 5. load from 00 to ACC, bitwise AND with value from 01

3003 # 6. store ACC value to address 03 f000

As in the previous task, change the initial values on lines 1 and 2 to your two hexadecimal numbers.

The three instructions on lines 5 and 6 (highlighted) have been inserted compared to the previous program. These new instructions are described in the table below.

Instruction

CPU

operation

ALU

operation

Address (A) /

Immediate (I)

Description

2000

2

0

A 00

Load value from address 00 of memory B to ACC

2201

2

2

A 01

Bitwise AND between ACC value and value from

address 01 of memory B

3003

3

0

A 03

Store value from ACC to address 03 of memory B

Copy lines 5 and 6 (highlighted), insert them before the f000 and amend them to do the following:

load the value from address 00 of memory B to ACC (as before)do a bitwise XOR with the value from address 01 of memory Bstore the value from ACC to address 04 of memory B
Save the amended file and paste under the heading Test Program .

Under Expected Result, use a table to predict the result of the bitwise AND and XOR operations on your numbers. Convert to binary to work out the bitwise results and then convert back to hexadecimal.

Load your amended program2.dat to memory A. Make sure your registers are showing zero, run the program and add an image under the heading Result . Compare the expected and actual results in a statement beneath the image.

Under the heading Explanation, explain (in your own words) the repeated use of the instruction

2000.

1.4 Amend the ALU
1.4.1 Overview
In this task, you expand the ALUs capabilities (beyond addition, bitwise AND, and XOR) by adding and testing new operations.

1.4.2 Detailed instructions
The new operations required by the ALU are as follows:

ALU operation 4: Logical right shift by constant 4 bits on the input from theALU operation 5: Set less Use a comparator from the arithmetic tools Logisim Evolution and set for unsigned 8-bit values with the output extended from 1 bit to 8 bits so that the operation functions as follows:Output hexa decimal value 01 when input 1 (previous ACC value) is less than inputOutput00 otherwise
Take an image of the updated ALU sub circuit only and paste under the heading ALU circuit .

To create a test program, start from your program for the previous task and add instructions to do the bit shift and store the result and do the set less than operation and store the result. Save the file and add to your report under the heading Test Program . The new instructions to do this follow the same pattern as the changes made in the previous task.

Under Expected Result , give the outputs you expect for the two new operations on at least three

tests of pairs of numbers as follows:

The first number is less than theThe first number is greater than theThe two numbers are the
At least one of these tests must use the two numbers based on your student ID. If the two numbers

are different, swap them so they are the other way around at addresses 00 and 01 in memory. If the two numbers are the same, change one of the numbers to get both results.

Run your program(s) and add images showing your tests under the heading Circuit at end of program . Write a statement under the heading Result that compares the expected result to the actual results.

Under the heading Explanation , describe your process for converting the output from the comparator to be 8 bits to match the rest of the circuit showing any research used.

1.5 Incorporating an Output device
1.5.1 Overview
In this task, you integrate an output device, a TTY (simple console output) into the CPU simulation to display the ASCII character corresponding to the current hex value in the ACC.

1.5.2 Detailed instructions
The instruction decoding unit has an unused control signal output labelled Output_Char which will be on when the CPU operation is 5.

Add a TTY component (from Logisim Evolutions Input/Output tools) in a suitable place in your CPU simulation.

Connect the following inputs on the TTY:

Clock input: as for the otherData input: value from the ACC excluding the highest order bit (use only 7 bits).Write enable: from Output_Char signal from the Instruction decoding
To test the TTY, prepare a test data file in v2.0 raw format (as for programs) containing hex ASCII values each separated by a space (or a new line). The ASCII values should represent a short message (like Hello), a separator (space, tab, newline) and your name (may be part of names over 8 letters). Paste your test data under the heading Test Data with a description of what should appear in the TTY output.

Write a program that has instructions for the following for each of the ASCII values stored:

Load value from memory B to ACCOutput ASCII value to TTY
Load your test data to memory B and your program to memory A. Paste your program under the heading Test Program. Run the program and paste an image under the heading Circuit at end of program . Under the heading Result , compare the TTY output to your prediction.

Under the heading Explanation show some research into what is meant by a TTY in this context and its limitations. Also give alternative methods to clear the TTY screen without using its clear input.

1.6 Branch instruction
1.6.1 Overview
It is fundamental to programming to have control structures like if/else statements and loops. We do this by setting the program counter (PC) value rather than just adding 1 for the next instruction.

In this task, you create a branch instruction where program control depends on value in the ACC. You will use this in a program with set less than (from task 1.4) to swap values if they are not in ascending order.

1.6.2 Detailed instructions
Firstly, change the ALU circuit so that the 1-bit output labelled ACC_NE_Zero (currently unconnected) outputs 1 when the ACCs value (going into the ALU) is not equal to zero, and output zero otherwise. You may use any wires/gates/components from Logisim Evolution inside the ALU to achieve this.

Test multiple situations by manipulating input pins in the ALU to demonstrate that ACC_NE_Zero outputs 1 when the ACC value is not zero, and outputs zero otherwise. Evidence this testing using images and short descriptions in the ALU circuit and testing section.

When the ALU change is complete, you need to change the CPU main circuit. There is a 1-bit control signal output from the instruction decoder labelled BNEZ (short for branch not equal to zero) which will be 1 when the CPU operation is 4.

When this BNEZ signal is 1 AND the ACC_NE_Zero from the ALU is 1, then the value in the program counter should be set from the address in the instruction (labelled Addr_or_Imm from the Instruction_Decoding_Unit). When this situation does not apply, the PC value needs to increase by 1 from the existing Adder component.

Before testing the changes, create a program to test whether two values are in order and swap them if not. The program must firstly store values at addresses 00 and 01 in memory B as in previous programs.

Your program must continue as in the following pseudocode:

Set ACC to 1 if value at address 00 is less than at 01 (slt) Branch to instruction f000 at end of program if ACC is not zero

Load

value

from

address

00

to

ACC

and

store

at

address

02

in

memory

B

Load

value

from

address

01

to

ACC

and

store

at

address

00

in

memory

B

Load

value

from

address

02

to

ACC

and

store

at

address

01

in

memory

B

Set the value at address 02 in memory B to be 00

Include comments (starting with #) in your program and add to your report under the heading Test Program .

For testing, use the same three pairs of initial values as used when amending the ALU (task 1.4). Under the heading Expected Results , briefly describe what you expect to see in each case.

Run the simulation, provide an image, and short description for each test under the heading Results.

Ensure that initial values (memory A) and final values in (memory B) are clear.

Explain the translation of pseudocode to actual instructions, especially the implementation of the branch instruction, in the Explanation section. Show additional research (and your knowledge of assembly language programming) to explain two other branch instructions that could have been created. Briefly explain how you could amend the simulation to cater for them. You do not need to make these changes.

1.7 Loop
1.7.1 Overview
This task builds on the previous ones to develop a longer program that sorts two values and counts up from the lower to the higher, displaying each as hex digits on the TTY. This task is more advanced than previously, and you should use and reference additional research (Generative AI or websites

etc.). Use additional sub-headings as needed in the report to help structure your evidence and explanations.

1.7.2 Detailed instructions
The TTY outputs ASCII characters based on the value in the ACC but now you should output the ACC value so that the user can read the hex digits. For example, if the ACC has the value 4b , and that value is sent directly to the TTY, the output will be K as the character in the ASCII table corresponding to 4b is K. Instead, to output 4b, the ASCII value for the digit 4 (which is hex 34) will need to be sent to the TTY followed by the ASCII value for the letter b.

You should add new operation(s) to the ALU and a subcircuit to convert a hex digit from the ACC to its ASCII value to be stored in the ACC ready to output to the TTY.

Under the heading Displaying Hex Output , use images and text to show research, circuit(s), program used and testing.

Build on your previous value-swapping program to implement the loop. You must stick to the pseudocode provided here for the loop and not add any further circuitry.

# the next line is the start of the loop

output value from address 00 and a whitespace character to the TTY add 1 to value at address 00 and store back at address 00

if value at 00 is less than value at 01 set ACC to 1 (slt) branch to start of loop if ACC is not zero (bnez)

output value from address 00 and a whitespace character to the TTY

You may initially test with values in ascending order, then combine the swap and loop logic into one program.

Test your program three times as with the previous task and document the program used and testing under the heading Running Loop .

Under the heading Explanation , detail the conversion of pseudocode into instructions and what happened when the two numbers were the same. From this pseudocode, there should be an error in that situation. Explain why the error happens without correcting it.

1.8 Game
1.8.1 Overview
This is an open-ended task that expects you to understand how the simulation works up to this point, extend it and write more complex programs. You are expected to show creativity and additional research rather than following detailed instructions and to determine how to structure your program(s) used and evidence of testing with sub-headings, text, and images.

The task is to create a simple console game for this CPU simulation that uses the TTY. You should add a feature to take user input, for this you will have to change the instruction decoding unit to have CPU operation(s) to take input. Many games involve random number generation and Logisim Evolution has a Random Generator in the Memory tools. If you use this, you would, again, need to change the Instruction Decoding Unit to add an operation for generating a random number and storing the value in the ACC.

2. RISC-V Assembly Language Programming
This assembly program development starts by amending and testing an existing assembly program that runs in the RARS RISC-V simulator. Download RISC-V_program_starter.asm from Moodle.

Adding the assembly language code to your report.
When you have finished the RISC-V assembly language programming tasks, include your code in the appropriate sections in Appendix B. The code should be in a fixed-width font (as with CPU simulation code) and should assemble and run if copied and pasted into the RARS RISC-V simulator.

2.1 Test the existing program with minor adjustments
2.1.1 Overview
In this task, you amend the starter code to input your student IDs last four digits as two 2-digit numbers, add them, and display the sum.

2.1.2 Detailed instructions
Open the provided starter code ( RISC-V_program_starter.asm ) in RARS. Save, assemble, and run the current code. For input, use the last four digits of your student id as two 2-digit numbers (as with the CPU simulation work). Take a screenshot of the Run I/O and paste this into the report under the heading Starter Program .

The program outputs zero instead of adding up the numbers. Under the heading Expected Result

write what the correct total should be.

In the code, identify which registers hold the input values. Add one line of code where there are two hashes ## to add up the two values and store the result in register s2. Take an image of the code, clearly showing your new line, and paste under the heading Program Code .

Assemble and run the updated program. Take a screenshot of the Run I/O showing the correct total, paste this under the heading Result with a statement to explain how this relates to the expected result.

2.2 Improving the messages that the program outputs
2.2.1 Overview
In this task, you will improve the programs messages to indicate that the input should be based on a student ID and that the output value is the total.

2.2.2 Detailed Instructions
Find the three hashes (###) in the code. Add code here to output enterMsg1 from the .data section. You can copy, paste, and amend code that outputs one of the other messages.

Create a new message in the .data section, named appropriately, with the text The total is: . Add code to output your new message after the total has been calculated but before its value has been output. Under the heading Program Code add image(s) showing the message definition and usage.

Assemble and run this code and show the Run I/O under the heading Results . Under the heading

Explanation , explain the importance of clear messages for the user of a program.

2.3 Enhancing the functionality of the program
2.3.1 Overview
In this task, you add functionality to the program by including bitwise AND and bitwise XOR operations into the program as well as keeping the original function of addition.

2.3.2 Detailed Instructions
Modify the program to compute and store the results of the following calculations:

Bitwise AND between the two input numbers and store in s3 (and)Bitwise XOR between the two input numbers and store in s4 (xor)
Output each result with a suitable message. Under the heading Program code show the AND and XOR instructions. Paste your full code to this point in the correct section in Appendix B.

Under the heading Expected Result , predict the output in the Run I/O, including the result of the addition, AND and XOR operations and accompanying messages. From the equivalent CPU simulation task, you should have the expected results of the bitwise operations but will need to convert your answers into decimal.

Place screenshots of the Run I/O for your test in the Result section with a sentence comparing the results to your expected result.

In the Explanation section, explain what is common about the syntax of the add , and orinstructions in RISC-V assembly language.

Use images and brief text to compare the addition and bitwise logic operations from the CPU simulation to the assembly language tasks. You should consider how you develop the machine code and how you check whether the results are correct. Make sure that the points you make are specific to this work, you could research RISC-V instruction format.

2.4 Adding a subroutine
2.4.1 Overview
For this task, you will refactor the previous program to use a subroutine for outputting messages and results, reducing code repetition.

2.4.2 Detailed Instructions
Create a subroutine (with a suitable label) that outputs message(s) followed by a numeric (integer) value. The address of the first text to output should be in register a0 and the numeric value should be in register a1 before the subroutine call.

After creating your subroutine, find the places in the code that outputs text followed by an integer and replace these with subroutine calls making sure that the values in registers a0 and a1 are set correctly.

Document the subroutine and calling it using screenshots under the heading Subroutine Code and paste the code under the appropriate heading in Appendix B.

Assemble and run the program and take screenshot of the Run I/O and place this in the report under the heading Result .

Under the heading Explanation , you should then explain the importance of using subroutines (procedures, methods) in programming, what jal and ret stand for in the context of a subroutine in RISC-V assembly language and how they are used in your program.

2.5 Swapping Numbers
2.5.1 Overview
A common task in computing is to sort values (e.g., from lowest to highest). For this task, you create a program that asks the user for two numbers and arranges the numbers in order from lower to higher. You will look at multiple ways to do this.

2.5.2 Detailed Instructions
Create a new, blank program in RARS and save with an appropriate name. Add code to ask for two numbers and store them in registers s0 and s1. This can be copied from the previous program.

For your first approach for the checking and swapping, you must convert the following pseudocode into RISC-V assembly language using the instructions given in brackets. This pseudocode assumes that the numbers are already in registers s0 and s1.

Set register t1 to 1 if value in s0 is less than s1 (slt) Branch to label sorted if t1 is not equal to zero (bnez)

Copy s0 to s2 (add) Copy s1 to s0 (add) Copy s2 to s1 (add)

sorted:

# Output a message and the values in ascending order # separated by an individual character

Show your swapping code under the heading Program Code (without the input/output code).

Under the heading Expected Result give a brief overview of three tests and the expected outcomes. The three tests must have at least one using the 2-digit numbers based on your id and must cover:

The values are not in the right order and need to beThe values are already in the rightThe two values are the
Run your tests and use screenshots of the Run I/O and the registers with their final values under the heading Result with short statements explaining what has happened.

Research an alternative approach to swap the values and create a second version of the program. Show the new swapping code under the heading Alternative approach also explaining the research done. Run the same tests as previously and use images to show that this approach also works.

Finally, under the heading Explanation , briefly describe the similarities and difference(s) between your approaches and which you prefer with reasons.

2.6 Counting up with a loop
2.6.1 Overview
You now have a program that sorts the values into ascending order (if needed). Now you will extend that program to count up and output all integers from the lower to the higher (including both ends).

2.6.2 Detailed Instructions
For your first version, you must convert the following pseudocode using the instructions given in brackets which assumes that the values in s0 and s1 are already sorted.

loop:

call subroutine to output value from s0 and a whitespace character add 1 to s0 and store in s0 (addi)

set t1 to 1 if s0 is less than s1 (slt) branch to label loop if t1 is not zero (bnez)

loopdone:

call subroutine to output value from s0 and a whitespace character

Create the program based on either version of your swapping program and the pseudocode above. The pseudocode needs a subroutine to output value from s0 and a whitespace character (space or tab). The character must be output using the system call (ecall) for outputting an ASCII character.

Include screenshots of your loop code and subroutine under the heading Loop Code and add the code to Appendix B. Assemble and run it at least twice; using your two numbers (based on your student id) and where both inputs are equal. Show the Run I/O under the heading Results .

Research an alternative approach for the loop construction using a different branch instruction which should correct the error from following the pseudocode (the error was also in the CPU simulation task). Create a new program to use this approach but keeping the rest of the program the same (the input, swapping and subroutine). Show the amended code and your results from the same tests as before under the heading Alternative approach with the source of your research.

Finally, under the heading Explanation , compare the two loop approaches used.

2.7 Using arrays
2.7.1 Overview
In this task you take the loop program further, instead of outputting the values in the original loop you are going to store the numbers in an array.

This and the following task have less detailed instructions. You should still check the Additional Hints document.

2.7.2 Instructions
Using Moodle material and other research, you should be able to store the individual numbers from the loop in an array in static memory (data segment). When that processing has stored the numbers in the array, you will use a separate loop to go through the array and output to the console.

Use pseudocode to plan the program and add under the heading Pseudocode. Assume that your users will input two integers between 00 and 99 and do not cater for values outside this range.

Under Expected Result , state what you expect to find once the program has finished running using your two numbers. Include what you expect to see in memory and registers as well as the Run I/O.

Assemble and run the program, put the code in Appendix B and take a screenshot of the run I/O and of the data segment showing the digits in the array in memory. Place the screenshots under the heading Result with a brief sentence comparing this to your expected result.

Under the heading Explanation , describe briefly what an array is and in detail the parts of your code that relate to using an array. Look back at the use of memory for the CPU simulation and explain to what extent it is possible to use an array or what you might need to do to the circuit to allow you to use an array. You should do additional research for this task but do not need to change the circuit.

2.8 Designing a console game

2.8.1 Overview
This open-ended task expects you to write more complex assembly language programs. You will need to determine how to structure your evidence with sub-headings, text, and images.

The task is to design and create a simple console game in RISC-V assembly language to run in RARS. The game can be single player or two people at the same computer. You are required to explain your game and show your process of creating the game and the techniques used with stages of development and testing the game, including where you can run a partial game. Many games involve random number generation and RARS has a system call available for that.

3. Completing the Report, Submission and Marking

3.1 Completing the report
In your report, you are expected to complete the title page, update the contents page so that the section headings and page numbers are correct and make sure that you have added your references, use of Generative AI and code in the appendices as required. Tasks will be considered as attempted but not complete if the code is not available.

3.2 Submission
Submit your report to Moodle as a word document (.docx), pdf or open document format (.odt). The file should be named with your initial and surname followed by Computer Architecture report (e.g., my E_Duffin_Computer_Architecture_report.docx).

Turnitin will measure similarity between reports and with internet sources. This will identify highly similar amendments made in the practical work or close similarity of the written work to other reports or different sources. Similarity may be investigated as potential academic misconduct.

3.3 Marking Criteria
The report will be marked according to the marking grid below. Higher marks are gained from submissions that show a more professional approach, not just the number of tasks completed. Both aspects of practical work (CPU simulation and RISC-V Assembly language) have eight tasks to work on. The marking grid shows that three tasks need to be complete for a pass (40%) and five tasks complete for a good grade (60%).

Credit for the practical work depends on it meeting the requirements specified in this document; the evidence and explanations in the report (images and text) and the code in the appendix matching that evidence. The mark will be adjusted according to how professionally the tasks have been done and presented in the report including the use of the template and of additional research or advice (including generative AI). Students may be called to a meeting to discuss the work (as described on page 2) if the submission seems to have used external research (including generative AI) which is not acknowledged.

Professionalism also includes the clarity, accuracy, and completeness of the text and images. Additionally, the position and labelling of components and wires (CPU Simulation), the code layout, choice of label names, use of comments, not having unnecessary code (Assembly language) will be taken into account.

The marker will mark both criteria (CPU simulation work, RISC-V assembly language work) using stepped marks, that is they will be at the bottom, middle or top of a grade band. For example, if an aspect is marked in the 60s, it will be awarded 62, 65 or 68 according to its quality. The overall grade will be the rounded average of the grades for the two aspects. For example, if a student achieved 58% for CPU simulation and 65% for Assembly language the overall mark would be (58 + 65)/2 = 62. Later tasks on both sections are designed to be much harder than earlier tasks so it is not advised to aim for over 80% on one section but not do the other at all.

Criteria

0-29%

30-39%

40-49%

50-59%

60-69%

70-85%

86-100%

CPU

simulation amendment, testing and explanation.

50% of the unit grade

There is little or no evidence of the CPU simulation work.

There is little or no text accompanying the task(s).

There is evidence of completing at least two of the tasks.

There is some attempt to accompany the evidence with text.

There is evidence that at least three of the tasks are complete.

The tasks are presented and explained adequately.

There is evidence that at least four of the tasks are complete and working.

The tasks are explained clearly and there is evidence of considering the presentation of the circuit.

There is evidence that five of the tasks are complete and working correctly.

The tasks are explained carefully and accurately with good presentation of the circuit and overall report. There is some evidence of research.

There is evidence for seven of the tasks with six complete and working correctly but one task may have major errors.

The tasks are explained accurately, thoroughly, and fluently. The circuits and overall report are presented very well. There is good evidence of research.

There is evidence that all tasks are complete and working correctly, although there may be minor issues on one task.

The tasks are explained accurately, thoroughly, and fluently. The circuits and overall report are presented very well. There is very good evidence of analysis and incorporation of

research.

RISC- V

Assembly language amendment and testing, and explanation

50% of the unit grade

There is little or no evidence of the assembly.

There is little or no text accompanying the task(s).

There is evidence of completing at least two of the tasks.

There is some attempt to accompany the evidence with text.

There is evidence that at least three of the tasks are complete.

The tasks are presented and explained adequately.

There is evidence that at least four of the tasks are complete and working.

The tasks are explained clearly and there is evidence of considering the presentation of the code. There is some comparison with the CPU simulation work.

There is evidence that five of the tasks are complete and working correctly.

The tasks are explained carefully and accurately with good presentation of the report and the code, including comments. There is focused comparison with the CPU simulation work.

There is some

evidence of research.

There is evidence for seven of the tasks with six complete and working correctly but one task may have major errors.

The tasks are explained accurately, thoroughly, and fluently. The report and code are presented very well including comments in the code. There is good, focused comparison with the CPU simulation work. There is good evidence of research.